Qijie Technology
Automated EDA solutions for functional engineering change orders.
| Date | Investors | Amount | Round |
|---|---|---|---|
* | N/A | Series A | |
| Total Funding | 000k | ||
Qijie Technology, also known as Easy-Logic Technology Ltd., is a high-tech company specializing in Electronic Design Automation (EDA) industrial software. The company was founded in 2013 in the Hong Kong Science Park. It was co-founded by a professor and three doctoral graduates from the Chinese University of Hong Kong, including CEO Wei Xing (Sean Wei). The founding team had years of experience in EDA, particularly in front-end logic synthesis and formal verification, and had won the prestigious ICCAD competition for three consecutive years (2012-2014), which provided a technical foundation for the company.
The firm focuses on developing solutions for the Engineering Change Order (ECO) process in Application-Specific Integrated Circuit (ASIC) design. Its main product is EasylogicECO, a functional ECO tool that automates the process of implementing small, post-design modifications to a gate-level netlist based on Register-Transfer Level (RTL) changes. The software is designed to generate the smallest possible patch circuit, minimizing the impact on the existing design, which helps shorten product development cycles and save costs. Key features include support for large-scale ASIC designs, metal-only ECO for post-tapeout modifications, and Design-For-Test (DFT) ECO support through its ScanChainECO product.
Qijie Technology's business model involves providing these specialized EDA tools to semiconductor design companies. The company operates with a brand philosophy centered on customer trust and technological leadership. Its revenue is generated through the sale and licensing of its software products. Qijie serves a global client base, with customers in mainland China, Taiwan, the United States, and South Korea. The company has received multiple rounds of funding, including an angel round in 2017 and a Pre-A round in 2019.
Keywords: Electronic Design Automation, EDA, functional ECO, Engineering Change Order, ASIC design, semiconductor, logic synthesis, formal verification, gate-level netlist, RTL modification, EasylogicECO, chip design software, digital integrated circuits, patch optimization, Design-For-Test, DFT, ScanChainECO, metal ECO, logic optimization